NSF-NRI Graduate Student and Postdoctoral Fellow Supplements to NSF Centers in Nanoelectronics (NSF 10-031)

Post Date

April 1st 2010

Application Due Date

May 10th 2010

Supplement Due Date(s) (due by 5 p.m. proposer's local time): May 10, 2010

Funding Opportunity Number

PD-10-031

CFDA Number(s)

47.041
47.049
47.070

Funding Instrument Type(s)

Grant

Funding Activity Categories

Science and Technology and other Research and Development

Number of Awards

0

Eligibility Categories

Unrestricted

Funding

• Estimated Total Funding:

  $0

• Award Range:

  $None - $None

Grant Description

See the Dear Colleague Letter, NSF 10-013, announcing this opportunity at http://www.nsf.gov/publications/pub_summ.jsp?ods_key=nsf10013.The National Science Foundation (NSF) has undertaken a cooperative effort with the Semiconductor Industry Association (SIA) through the industry's Nanoelectronics Research Initiative (NRI) to provide supplemental funding opportunities to NSF centers involved in long-term nanoelectronics research. The supplemental funding supports additional graduate students and postdoctoral fellows to work in collaborative efforts with participating NRI company assignees on exploring new concepts beyond the scaling limits of CMOS (Complementary Metal Oxide Semiconductor) technology. Such efforts are intended to enhance nanoelectronics research and education, strengthen industry linkages with NSF centers, and develop future cadres of industry and faculty researchers to help drive the field.NSF and NRI are continuing this cooperative supplement opportunity for a fifth year. The supplement research topics must be consistent with the goals of the NSF centers and must also align with the goals of NRI to find a novel, non-FET based logic switch as a successor to CMOS technology. NRI is focused primarily on research on devices utilizing new computational state variables other than the control of electronic charge by a potential barrier utilized in current FET technology. For this supplement opportunity, NRI is particularly interested in three areas: Circuit architectures for doing computation with non-FET devices; directed self-assembly and bottoms-up fabrication of specific non-FET device structures; and nano-engineering of phonon flow in non-FET devices and circuits to control heat and enable non-equilibrium behavior. Since the primary limitation to scaling is increasing power density, all of the non-FET devices and architectures should focus on opportunities for achieving low energy consumption while maintaining high computational speed, and NRI is open to new ideas in this area in general.Recent awards made through this supplement activity may be found at http://www.nsf.gov/crssprgm/nano/

Contact Information

• Agency

  National Science Foundation

• Office:

  None

• Agency Contact:

  NSF grants.gov support
  grantsgovsupport@nsf.gov
  

• Agency Mailing Address:

  If you have any problems linking to this funding announcement, please contact

• Agency Email Address:

  grantsgovsupport@nsf.gov

• More Information:

  NSF Program Desccription 10-031